Journals and Refereed International Conferences

• Hiroki Morizumi
  On the Power of Nondeterministic Circuits and Co-Nondeterministic Circuits
  [C] Proc. of the 15th LATA, LNCS ????, pp. ??-??, 2021 (Milan, Italy)
  
  
• Hiroki Morizumi
  A Satisfiability Algorithm for Synchronous Boolean Circuits
  [J] IEICE Transactions on Information and Systems, vol. E104-D, no. 3, pp. ??-??, 2021
  
  
• Hiroki Morizumi
  Zero-Suppression and Computation Models
  [C] Proc. of the 29th IWOCA, LNCS 10979, pp. 263-272, 2018 (Singapore)
  Note: The old title is "Zero-Suppressed Computation: A New Computation Inspired by ZDDs".
  
  
• Hiroki Morizumi
  Lower Bounds for the Size of Nondeterministic Circuits
  [C] Proc. of the 21st COCOON, LNCS 9198, pp. 289-296, 2015 (Beijing, China)  [arXiv]
  
  
• Hiroki Morizumi
  Sensitivity, Block Sensitivity, and Certificate Complexity of Unate Functions and Read-Once Functions
  [C] Proc. of the 8th IFIP TCS, LNCS 8705, pp. 104-110, 2014 (Rome, Italy)
  
  
• Kei Uchizawa, Zhenghong Wang, Hiroki Morizumi and Xiao Zhou
  Complexity of Counting Output Patterns of Logic Circuits
  [C] Proc. of the 19th CATS, CRPIT 141, pp. 37-43, 2013 (Adelaide, Australia)
  
  
• Evgeny Demenkov, Alexander Kulikov, Ivan Mihajlin and Hiroki Morizumi
  Computing All MOD-Functions Simultaneously
  [C] Proc. of the 7th CSR, LNCS 7353, pp. 81-88, 2012 (Nizhny Novgorod, Russia)
  
  
• Hiroki Morizumi
  Improved Approximation Algorithms for Minimum AND-Circuits Problem via k-Set Cover
  [J] Information Processing Letters, vol. 111, no. 5, pp. 218-221, 2011  [pdf]
  
  
• Hiroki Morizumi
  Limiting Negations in Non-Deterministic Circuits
  [J] Theoretical Computer Science, vol. 410, no. 38-40, pp. 3988-3994, 2009  [pdf]
  
  
• Hiroki Morizumi
  Limiting Negations in Formulas
  [C] Proc. of the 36th ICALP, LNCS 5555, pp. 701-712, 2009 (Rhodes, Greece)
  Note: Some results have appeared in the preliminary version "A Note on the Inversion Complexity of Boolean Functions
  in Boolean Formulas," CoRR arXiv:0811.0699, Nov., 2008.
  
  
• Hiroki Morizumi and Genki Suzuki
  Negation-Limited Inverters of Linear Size
  [J] IEICE Transactions on Information and Systems, vol. E93-D, no. 2, pp. 257-262, 2010
  [C] Proc. of the 19th ISAAC, LNCS 5369, pp. 605-614, 2008 (Gold Coast, Australia)
  
  
• Hiroki Morizumi and Jun Tarui
  Linear-Size Log-Depth Negation-Limited Inverter for k-tonic Binary Sequences
  [J] Theoretical Computer Science, vol. 410, no. 11, pp. 1054-1060, 2009 (Special issue on TAMC 2007)
  [C] Proc. of the 4th Annual Conference on Theory and Applications of Models of Computation (TAMC 2007)
      LNCS 4484, pp. 605-615, 2007 (Shanghai, China)
  
  
• Kazuo Iwama, Hiroki Morizumi and Jun Tarui
  Negation-Limited Complexity of Parity and Inverters
  [J] Algorithmica, vol. 54, no. 2, pp. 256-267, 2009 (Special issue on ISAAC 2006)
  [C] Proc. of the 17th ISAAC, LNCS 4288, pp. 223-232, 2006 (Kolkata, Indea)
  
  
• Kazuo Iwama, Hiroki Morizumi and Jun Tarui   (In the conference version, Kazuo Iwama and Hiroki Morizumi)
  Reductions for Monotone Boolean Circuits
  [J] Theoretical Computer Science, vol. 408, no. 2-3, pp. 208-212, 2008
  [C] Proc. of the 31st MFCS, LNCS 4162, pp. 540-548, 2006 (Stara Lesna, Slovakia)
  
  
• Kazuo Iwama and Hiroki Morizumi
  An Explicit Lower Bound of 5n - o(n) for Boolean Circuits
  [C] Proc. of the 27th MFCS, LNCS 2420, pp. 353-364, 2002 (Warsaw, Poland)
  
  

Others

• Hiroki Morizumi
  The Size and Width of Boolean Circuits
  Proc. of the 3rd Annual Meeting of the Asian Association for Algorithms and Computation (AAAC 2010), p. 45, 2010 (Pohang, Korea)